[Coco] Grant Searles SBC

[Matthew Stock]

Bill,

When it's in this state, what do BA and BS look like on rise of Q?  are
they both high?  If not, it's not a halt state but something else.  Only
thing I can think of is to put a 1uF cap between the reset line and ground
to complete the RC circuit and see if that helps.  I suspect the reset
isn't a clean slope and that's annoying the CPU.

Matt


On Wed, May 6, 2015 at 7:16 PM, Bill Nobel <b_nobel at hotmail.com> wrote:

> Hi guys.  This is a shout out to the Hardware Experts out there.  I am
> trying to build this unit on a breadboard and am having some issues.  I am
> following the circuit to a tee.  Powering up I get 1.843 mhz on the E & Q
> lines R/W is working.  But sometimes when I hit reset my BA line goes high
> throwing CPU into HALT state even though my HALT is tied High.  Also on the
> terminal window I am getting nothing but garbage @ 115200 baud.  The one
> difference to the circuit I am using a FTDI instead of the 9 pin serial
> plug.  I verified the FTDI by connecting to a old desktop pc using
> Hyperterm so the chip is working.  But on the SBC I get nothing.  I even
> went to the extent of swapping out all the chips and verified by hand the
> Eprom code to see if it Burned properly.
>
>  Any suggestions or help would be appreciated.
>
> Bill Nobel
>
>
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