[Coco] WAS new mylars, NOW PCB Design

[Zippster]

Decoupling caps are something that is often cited as being something people forget at first,
or don’t use properly.  Which makes sense, because they aren’t always mentioned on data
sheets, and sometimes not even shown on some of the simple schematics, being assumed.

You probably did have a clean supply from the USB port on your board, but a lack of decoupling
could have introduced noise into the board’s power as whatever ICs were on board tried to draw
too much power too quickly.  That’s where the decoupling caps come in.  

If there are manufacturer suggested decoupling guidelines in a device data sheet, use them
of course, but a general rule of thumb when nothing is mentioned is to use one .01uF - .1uF ceramic
capacitor per power pin (some devices have several or more).  In addition to this you can
use if necessary Electrolytic or Tantalum caps of higher value at the power input to your board,
and distributed around the board if it’s a large one.

This should be sufficient for frequencies up to 50mhz or so.  At higher frequencies interplane 
capacitance such as Mark mentioned earlier (capacitance between ground and power planes)
become useful (and necessary above around 500mhz).

So, basically, until you’re dealing with higher frequencies the old standard .01uF to .1uF per
per power pin rule of thumb should be good.  :)

- Ed



> On Aug 11, 2015, at 3:14 PM, Salvador Garcia <ssalvadorgarcia at netscape.net> wrote:
> 
> I'll start at the end:
> "It’s a lot of fun building things,
> isn’t it?  :)"
> 
> Oh yeah!!!
> 
> Thank you starting this thread.
> 
> I think my gravest error with my first board is that I did not use any decoupling caps. I knew these are important, but decided to not include them because my board gets it power from the PC's USB port. I should not have assumed that the 5v was clean.just because it had been "preprocessed" by the PC.
> 
> Way back then when I managed product design I got a chance to work with the PCB layout engineer and understand the the trails of getting everything routed. I captured the schematic using ORCAD and the engineer imported the nets into PADS PCB. The engineer then took up to 4 weeks routing everything. He initially would autoroute, but then would manually work with each one individually. Since there were 4 layer boards, two of these were reserved for power and ground and the other two for traces. This was akin to solving a complex puzzle, sometimes leading to a dead end. In that case the engineer would start from scratch to find another way to route. Usually the first 90% of the traces were no problem. It was the last 10% that provided a challenge and the last 2% that determined whether the board could be routed or not. At times the engineer changed the placement, taking into account any placement that was critical.
> 
> I learned enough from this engineer to know that various factors have to be taken into account, some of which you mention.
> 
> Fortunately, I did include a pseudo ground plane (meaning that I have a ground plane, but it only covers part of the PCB) so at least I can say I am headed in the right direction (even if I am not there yet. The ground plane covers all ground connections except one. I have traces on that layer too. As I learn more I hope to make the boards more efficient and robust.
> 
> Great tip on building your own component library. I had to do that to include an Arduino Nano in the design. It came out better than I expected, but still with a few holes (For one, I missed adding the silkscreen to define the component outline)..
> 
> Thanks for offering to share. I am ready to learn as much as I can.
> 
> 
> Salvador