[Coco] Last video I promise... :)

[Gene Heskett]

On Friday 05 December 2014 19:57:46 Luis Antoniosi (CoCoDemus) did opine
And Gene did reply:
> cool. One of the problems I see with the GBS is that people only use  a
> NOR gate to combine and invert h and V. But, you don't get the
> serrillated blanking in this way.
> 
> I think the correct would be using a XNOR gate. Do you agree ?
> 
> 
> 
> Luis Felipe Antoniosi
> 
Come on folks, snip with abandon, this incoming message ws north of 18 
kilobytes because no one on this thread has snipped a character.

Anyway, no, that will likely not work because it would have the effect of 
reversing the leading edge timings of the H-sync during the Vsynch.  The 
GBS card would probably loose its cookies over that.

There used to be a one chip NTSC sync generator, but its been yonks since 
NTSC is dead and has been since June 30th 2008.  As to there being a one 
chip vga sync chip, there may be.  At that point the question is, can you 
build a PLL that could stand to lose its hsync for 10+ lines at a time.

Or even better, can you synth it in the FPGA?  If thats a fail, you get 
waving picture tops as it regains the phase.

Cheers, Gene Heskett
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