[Coco] Xilinx ISE Assigning Signals to Specific Pins

[Phill Harvey-Smith]

On 17/10/2012 12:22, Mark McDougall wrote:
> On 17/10/2012 6:11 PM, Kip Koon wrote:
>
>> Here's a Xilinx ISE question for you all who are into CPLD's for your
>> projects.  I get successful implementations, that is compiles, but every
>> time I make a change, all the signals change to different pins.  How do I
>> assign each signal to a specific pin.
>
> You need to add the net names and corresponding pin locations to the
> .UCF file.

Depending on which version of Webpack you have, there is a graphical 
tool that allows you to assign the pins. I'll have a look this evening 
as I don't have webpack on my work machine...

> Should be plenty of examples around.

Indeed.

Cheers.

Phill.