[Coco] 6309/6809 opcodes with mixed 8/16 bit registers

[Juan Castro]

On Tue, Nov 20, 2012 at 2:14 PM, Harry Hurst <hhos at st-tel.net> wrote:
>
> One thing I've found, that may not be in your book, Darren, is that the supposedly "not allowed" modes [,R+] and [,-R] are actually functional on the 68B09E.

Whoa, so do these increment and decrement the index register (to use
the next pointer next time) or the memory pointer? Hummm, since it's a
one byte increment it must be an increment to the memory pointer, it
wouldn't be useful otherwise. Am I right?

But the question is valid for [,W++].

I'm having some 6502 feelings here. Such feelings are never good.

> They are "not allowed" in every reference I could find, and yet they work. I think most, if not all, assemblers disallow them, for good reason, but if the CPU encounters an instance of this, it will execute it just fine. The 6309 uses the [,R+] opcodes for some limited indexing with the W register. Here's a short list of these and other invalid-on-the-6809 indexing mode differences:
>                                 CPU
> Postbyte              6809               6309
> $90                  [,X+]("NA")           [,W]
> $B0                  [,Y+]("NA")           [n16,W]
> $D0                  [,U+]("NA")           [,W++]
> $F0                  [,S+]("NA")           [,--W]
> $87                   A,X (dup/$86)         E,X
> $A7                   A,Y (dup/$A6)         E,Y
> $C7                   A,U (dup/$C6)         E,U
> $E7                   A,S (dup/$E6)         E,S
> $97                  [A,X] (dup/$96)       [E,X]
> Presumably $B7, $D7, and $F7 follow suit for the Y, U, and S registers and are duplicates of $B6, $D6, and $F6.