[Coco] A Technical Question

[jdaggett at gate.net]

On 18 May 2012 at 16:03, Mark McDougall wrote:

> 
> 2. HALT CPU access to video memory during active video. Obviously 
> detrimental to CPU performance.

Definitely a poor way to go if you have constant and/or frequent IRQs. If the HALT period is 
long enough to overlap two or more IRQs then the first is latched and subsequent IRQs will 
more than likely be lost. 

HALT is a nice way for a peripheral processor to use the commonmemory for short burst say 
about 32 bytes or less. The 6809 version, not 6809E, with its internal DMA module only 
allows up to 32 cycles before another cpu cycle is ran. With two cycles per byte would mean 
16 bytes per DMA cycle max. 


james