[Coco] COCO FPGA

[John Kent]

On 25/12/2011 7:41 AM, Joel Ewy wrote:
> On 12/24/2011 02:17 PM, Mark McDougall wrote:
>
> If you're using a DW ROM on a 'real' CoCo then programs that hit the 
> hardware will miss the DriveWire.  But Gary implemented the DriveWire 
> protocol in Verilog (Or is it VHDL?  I know that the CPU09 is in one 
> and the rest of the system is in the other, but don't remember which 
> is which) on CoCo3FPGA, and it emulates the FDC registers.
>
> JCE
>
Gary implemented CoCo3FPGA in Verilog, I wrote CPU09 in VHDL. Verilog 
and VHDL can be mixed and matched in the FPGA design software. There 
have been some changes in CPU09 recently that fix a bug in the halt 
signal and also FIRQ. I posted the new version of CPU09 to the System09 
mailing list so Gary should have a copy of it.

John.

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