[Coco] How does the SCS line / GIME Setting Work?

[Darren A]

On 6/19/10, Brett Gordon wrote:
> I hope this isn't too silly of a question to ask.  I'm foggy on the workings
> of the SCS line and how the SCS setting on the GIME chip effects it.
>
> >From what I gathered the SCS line is asserted when the address bus is from
> 0xFF40 and 0xFF5F.   I assuming it's a specialized address line used to
> "help" the FDC out. I'm assuming a FDC pack could do this itself if it
> wanted too.  I'm figuring Tandy wanted to make their FDC a bit cheaper, so
> added this line to the CoCo's Cart port.  Is there any other *regular* uses
> for this line?
>
> And exactly what does the GIME's SCS enable do in 0xFF90 ?  I seem to
> remember playing with this setting once, and my FCD software stopped
> working.  So if your GIME's SCS's bit in 0XFF90 is off, the SCS will never
> be asserted?
>

--

You are correct.  The SCS line is an Address Decode signal that
'normally' indicates an address access from FF40 to FF5F.  This
originated from a feature of the SAM chip which outputs a unique
address code for the ranges FF00-FF1F, FF20-FF3F and FF40-FF5F (among
others).  The first two were used internally for selection of the
PIAs. The third was considred a spare and thus given the name "Spare
Chip Select".

The GIME's SCS bit in FF90 will restrict the SCS range to FF50-FF5F
when off.  Softawre which communicates with the FDC does so through
addresses in the FF40-FF4F range, so turning off this bit will
effectively disable the disk controller.

Darren