[Coco] Dual UART with FIFO Card for the CoCo

Gene Heskett gene.heskett at gmail.com
Sun Jun 13 23:42:42 EDT 2010


On Sunday 13 June 2010, Phill Harvey-Smith wrote:
>Gene Heskett wrote:
>> On Sunday 13 June 2010, Phill Harvey-Smith wrote:
>>> Gene Heskett wrote:
>>
>> There is an echo in here Phill. ;-)  And as long as we use modern cmos
>> chips, the additional drain on the coco's supply should be minimal,
>> particularly if we replace some of the old hungry TTL stuff that
>> wouldn't be needed as it would just dup what we'll do but we'll do it
>> better.
>
>Indeed, though there is one fly in the ointment I noticed from the CoCo
>rom disassebilies, the Init code on the CoCo 1/2 actually takes
>advantage of the mirrored PIA 1 addresses :(
>
>A02A 8E FF 20       LA02A    LDX     #PIA1    	POINT X TO PIA1
>A02D 6F 1D                   CLR     -3,X       CLEAR PIA0 CONTROL
>REGISTER A
>A02F 6F 1F                   CLR     -1,X       CLEAR PIA0 CONTROL
>REGISTER B
>A031 6F 1C                   CLR     -4,X       SET PIA0 SIDE A TO INPUT
>A033 CC FF 34                LDD     #$FF34     *

Indeed.  And they saved what, 1 byte?  Me goes off muttering about that 
coders geneology...

>A036 A7 1E                   STA     -2,X       * SET PIA0 SIDE B TO
> OUTPUT A038 E7 1D                   STB     -3,X       * ENABLE PIA0
> PERIPHERAL REGISTERS, DISABLE PIA0
>A03A E7 1F                   STB     -1,X       * MPU INTERRUPTS, SET
>CA2, CA1 TO OUTPUTS
>A03C 6F 01                   CLR     1,X        CLEAR CONTROL REGISTER A
>ON PIA1
>A03E 6F 03                   CLR     3,X        CLEAR CONTROL REGISTER B
>ON PIA1
>A040 4A                      DECA               A REG NOW HAS $FE
>A041 A7 84                   STA     ,X         BITS 1-7 ARE OUTPUTS,
>BIT 0 IS INPUT ON PIA1 SIDE A
>A043 86 F8                   LDA     #$F8       =
>A045 A7 02                   STA     2,X        = BITS 0-2 ARE INPUTS,
>BITS 3-7 ARE OUTPUTS ON B SIDE
>A047 E7 01                   STB     1,X        * ENABLE PERIPHERAL
>REGISTERS, DISABLE PIA1 MPU
>A049 E7 03                   STB     3,X        * INTERRUPTS AND SET
>CA2, CB2 AS OUTPUTS
>A04B 6F 02                   CLR     2,X        SET 6847 MODE TO
>ALPHA-NUMERIC
>A04D C6 02                   LDB     #$02       *
>A04F E7 84                   STB     ,X         * MAKE RS232 OUTPUT
> MARKING
>
>By the looks of things both the Dragon 32 and 64 roms don't have the
>same problem, however the 64 has the 6551 ACIA at $FF04-$FF08. I guess
>the Tandy roms could probably be fixed, but that would mean blowing new
>roms to do so.

And that is something Ft. Worth would never have authorized.

>>  We just need to standardize how its done so that we don't have 250
>> individually unique versions, one for each of us left.  That would be a
>> disaster to the group as a whole.
>
>Indeed :(
>
>> Hint, leave the stuff at $ff40+ alone, because many of us have worked
>> out what works for us already.
>
>That would seem sensible.

Well, if I didn't say it, someone else would. ;-)

-- 
Cheers, Gene
"There are four boxes to be used in defense of liberty:
 soap, ballot, jury, and ammo. Please use in that order."
-Ed Howdershelt (Author)
Power tends to corrupt, absolute power corrupts absolutely.
		-- Lord Acton



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