[Coco] FPGA 63x09

N8WQ exwn8jef at gmail.com
Fri Mar 27 11:23:49 EDT 2009


Hi James and Stephan,
I was thinking about getting me a Xilinx FPGA board to start 
experimenting with. But before I delve into it I have a question to ask. 
Is the user CPU emulation (if I can use that term) erasable or is it 
permanent? In other words can you try different designs before you 
commit to a design. If I don't make sense that is because I don't know 
what I am talking about! :)

Alan Jones

-- 
N8WQ - Canal Winchester, Ohio
http://exwn8jef.googlepages.com/home



jdaggett at gate.net wrote:
> Stephan 
>
> That has been looked into. 
>
> There are a few issues yet to be resolved, one being my time primarily. Fortunately the busy 
> season of my line work is almost over and I should get more time to devote around the 
> middle of May. Of the other issues are which FPGA, which development board and which 
> design to modify or start from scratch. 
>
> In the case of which design to use: 
>
> There are four approaches that one can take
>
> 1) Modify John Kent's 6809 IP code .
>
> 2) Modify one of two 68HC11 IP codes
>
> 3) start from scratch
>
> 4) start with Fint Wheeler's code and modify it. 
>
> I started with approach #3 until I closely looked at the freely available code from Green 
> Mountain on their version of the 68HC11. I lean to the GM HC11 modification as I am a 
> hardware engineer as opposed to software engineers. My HDL coding style lends more to 
> me thinking in terms of hardware rather that more abstract levels. So for some my HDL 
> coding style may very well be primitive. I personally don't care as it is easier for me to 
> comprehend what is going on. I do not like long( ten and fifteen page) processes or entities. 
> To me it is easier to break them up into smaller sections if need be. The GM HC11 is rather 
> easy for me to read and maybe off an easier route to mdoify. The HC11 archetecture is not 
> all the dissimilar to the 6809 since both are offshoots of the 6800.  
>
> In the case of which FPGA to use
>
> 1) Alterra
>
> 2) Xilinx
>
> 3) Lattice
>
> 4) others
>
> I choose #2 simply because that is the brand I am familiar with and the tools are already 
> loaded. I am flexible if there is need for another set of tools as long as they are windows 
> based. 
>
> In the case of development board:
>
> There are several out there with many functions added. If XILINX is the choice, then a 
> Spartan 3E would be the better choice. There are plenty of already boards that range in cost 
> from about $150 to over $500. My choice is the Digilent Inc Nexsys2 board at $149. It has 8 
> bit color and has plenty of ram and flash. XESS has a setup that runs about $300 and 
> includes Networking capabilities. The onboard flash is pretty much dedicated for FPGA 
> configuration. 
>
> The ideal board would be the Nanoboard. But bundled with Altium's software at $4300 is out 
> of reach for most. The Nanoboard is very flexible. Then there is the route that theC-ONE 
> group took that has their own dedicated PCB. The could be even more expensive than a 
> moderately priced development board. 
>
> I hope I have not been to long winded in my reply even though I have. It probably has not 
> been due to the lack of ability to do a 6309 IP for an FPGA. Instead what to do with it once 
> one has been developed. 
>
> just my thoughts 
>
> james
>
> On 27 Mar 2009 at 8:48, Stephen Adolph wrote:
>
>   
>> I notice that there is a VHDL core for a 6809.  Would we know enough
>> about 6309 to be able to extend this properly?
>>
>> Might be a way to a much faster 6309 capability, not sure if the
>> machine could benefit from it though.
>>
>> ..Steve
>>
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>
>
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