[Coco] CoCo 1 64K upgrade failed :(.

[Ryan Pritchard]

On further reviewing the Datasheets say 128 refresh cycles/2ms, so because
it says so, I am not going to bother to understand the logic.

On Fri, Sep 26, 2008 at 4:05 PM, Ryan Pritchard <coconut at pritchard.ca>wrote:

> I don't understand why the SAM is only refreshing at 128 cycles.  You have
> 8 address bits getting latched on RAS and then the next 8 bit being latched
> on CAS.   Wouldn't 8 address bits mean 256 cycles?  Or is the refresh
> occuring for 2 rows per cycle?
>
>
-- 
Regards,

Ryan Pritchard
Fun Extends All Basic Life Expectancies