[Coco] [Color Computer] Re: POKE 65495,0

Robert Gault robert.gault at worldnet.att.net
Sat Feb 3 17:36:48 EST 2007


Darren A. wrote:

>>From: jdaggett at gate.net
>>
>>On 3 Feb 2007 at 18:58, James Diffendaffer wrote:
>>
>>
>>>James, if your read back through the tread you'll find we were talking
>>>about running the CoCo 1/2 in SAM high speed mode with the RAM refresh
>>>disabled.
>>>
>>
>>*************
>>First off I don't believe that you can disable the refresh counter on the 
>>SAM chip.
>>
>>--
> 
> 
> The datasheet for the SAM says that both the RAM refresh and VDG access to 
> the RAM are disabled when running in FAST mode. This is different than the 
> Address Dependent mode which doubles the CPU clocks only when the SAM is in 
> Map Type 0 and while the CPU is not accessing RAM.
> 
> When people talk about the double-speed poke for the CoCo 1/2, they are 
> usually referring to Address Dependent mode, since FAST mode results in loss 
> of the video display. There is no need to add any kind of refresh during IRQ 
> for Address Dependent mode.
> 
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> 

  Don't ignore the facts to fit the data sheets. Several of us have 
posted that with Coco1 F-board machines, we could run programs in full 
double fast mode with disabled video. When the crunching of the programs 
finished, they returned to normal speed and video without using the 
intermediate half-fast setting none the worse for the experience.
  There must be a reason why some Cocos can get away with this while 
others can't. My programs at least made no attempt to refresh memory.



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