[Coco] DMA in (Nitr)OS-9 LII?

[jdaggett at gate.net]

Mike 

The BA/BS lines also tell the state of the MPU. 

BS  BA   Status
0    0       Normal running
1    0       Interrupt acknowledge
0    1       Sync Acknowledge
1    1       Halt Acknowledge

You can use the BA line but you hae to consider the dead cycle that is inherent with this 
signal. The control signal that you may wish to consider is the "LIC" signal. This output is 
asserted low during the last instruction cycle of all 6809E instructions. Definietly you need to 
use the "TSC" control input to tristate the address and data busses during external buss 
acquisitions. 

As for parallel processors it would be a more simpler approach to use a peripheral 
processor. That would be one that is memory mapped and interrupts the MPU when it is 
done. Otherwise you may have to halt the main MPU to do its work. To do say math 
coprocessor say with a PIC, AVR, or FPGA it would be better to it as a parallel processor. 
ALl the mentioned devices can run at least 10 times faster thaan the stock 6809E.All can do 
most math in one or two 6809 machine cycles. 


james

On 23 Jul 2006 at 10:25, Mike Pepe wrote:

> jdaggett at gate.net wrote:
> > Joel
> > 
> > There is beside the internal clock generetor for the 6809 that the 6809E 
> > does not have, that is circuit that allows the external DMA controller to  halt 
> > the MPU for up to 16 Eclock cycles. Thus the DMA cycle works like this:
> > 
> > 16 cycles for DMA then one cycle for MPU followed by 16 cuycles for DMA. 
> > 
> > It keeps alternating t his for as long as needed I believe. There is no internal 
> > cuircuit for the 6809E. To do DMA with the 6809E you are going to have to 
> > do it by cycle stealing method. That is use the buss when the 6809E is not 
> > using it. It will take a far more complex circuitry than with the 6809. YOu will 
> > h ave to study ho wthe BA/BS lines function along with the AVMA, LIC, and 
> > BUSY contrrol signal works. 
> > 
> > Again all this has to be done during the MPU cycle of the EClock. It is not 
> > the cleanest or the fastest means of doing DMA but it is the only way with 
> > the contraints of the Coco. 
> > 
> > james
> > 
> 
> Actually, it's not that hard to do at least in theory. I was thinking 
> about this long ago. If you multiplexed the DMA controller with the cpu 
> on a daughterboard, it might actually work.
> 
> With the BA/BS signals and/or a circuit that looks for a read at $FFFF 
> will indicate the cpu is not using the bus for that cycle. You could 
> then switch over to the DMA for that cycle. Doing DMA in this way would 
> not collide with the cpu, video, or refresh. the downside to this is 
> that the DMA would appear to the hardware (MMU especially) as the cpu, 
> and reads and writes would use the same translated memory map as the 
> processor.
> 
> Maybe one of these days I'll build one. I think I have some 6844 DMAC 
> chips in my junk box.
> 
> 
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