[Coco] Re: [Color Computer] 1M simms in Cloud9 SIMM upgrade kit

[Mike Pepe]

I appreciate all the responses and discussion about this, but there's 
still something about it that doesn't make sense to me.

the 1M chip has a 512 cycle refresh. The GIME does 256. That much we know.

I guess if I take a 1M chip and tie its A9 line to 0, then all my 
accesses are going into that 9x9 bit matrix, but only 256 columns are 
being refreshed. Some of the data that's being written to that chip 
lives in columns 256-511 which are ordinarily refreshed by the 256 
column in a normal 256k dram. So essentially half the data I'm writing 
in that case is subject to loss if the cpu and/or normal video raster 
operations aren't reading data out of those columns.

So, then, I was wrong. However Paul's little self-refresh trick is 
fascinating. Seems to me that with a little daughterboard, if you really 
wanted to, you could hack 4 256kx4 chips into a workable 512k upgrade.

that might be an interesting little expermental project.

thanks again everyone... I guess until we make a FPGA-GIME replacement 
we're stuck.


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