[Coco] Re: CHIP-8 emulator for Coco

[Brett K Heath]

On Wed, 5 Jan 2005, David wrote:

[...]
> The main differences between the standards are the graphics mode, and a few
> extra features like larger in-built fonts, scrolling commands, etc

Yeah, you may or may not know that Super-Chip was an enhancement of Chip48
written to take advantage of the full screen resolution available on the
HP48 calculators.

> I have no concerns as to whether the Coco2 is up to the challenge of running
> the CHIP-8/SCHIP systems - the only problem could be my programming skills!
> (sketchy at best, as I'm learning 6809 ASM as I go along on this project!)

I recommend extensive use of the indexed addressing modes (which is
probably similar to the way they were implemented on the 1802, see
below:-).

> As for the source code, that's not a problem either.. I've written a little
> disassembler for the Coco that reads the CHIP-8 roms and outputs the object
> and disassembled source code to screen or printer as selected - its not too
> hard to identify whats happening after a bit of investigation and manual
> addition of labels :)

That's probably a lot easier than trying to read Saturn assembly listings
(Saturn is the processor used in the HP48 series). There does exist an
open source PowerPC implementation called Crazy-8, it's written in
something called FutureBasic (you can find it with a google search for
"schip emulator").

You were wondering about the instruction timings for Chip8, while I can't
answer this directly I do remember (well ok, I had to look it up, the
datasheets are online) some technical details about the COSMAC ELF that
might help you get a feel for it.

The ELF was basically a 4 chip all CMOS microcomputer, a keypad controller
which connected directly between the hex keypad and the cpu, a ram chip, a
video chip which connected to the cpu and generated composite video, and
of course the 1802 CPU. Sound was generated from a directly
settable/testable output pin on the CPU itself.

The chip8 resolution was determined by the resolution of the video chip.

The 1802 boasted 16 "scratch" registers, each 16 bits wide (also
accessible as 32 8-bit registers), an 8 bit D accumulator, a 1 bit alu and
a number of control registers. On powerup R0 was assumed to be the PC but
loading an internal 4-bit P register would set any of the 16 registers as
the current PC. There was no stack per se (although any of the scratchpad
registers could be used to implement one in software), the 1802 version of
a call was to load the P register with N where RN contained the address of
the start of the "subroutine", "returns" are accomplished by reloading P
with the register id of the "calling" PC. A second 4-bit "X" register
determined which of the scratchpad registers held the target address for
memory operands.

The ELF ran at 1.8 MHz, each instruction (except branch and skip
instructions) consisted of an 8 clock fetch cycle followed by an 8 clock
execute cycle. This works out to about 8 uS per 1802 instruction. I'm just
guessing but from the similarity between the chip8 virtual machine and the
1802 architecture most of the Chip8 instructions could probably be
implemented with only 2-8 1802 instructions (depending on whether the
chip8 registers where kept in memory or were maintained inside the
1802 register set). Which gives you an estimate of 16 uS to 64 uS per
chip8 instruction.

If you get really ambitious you might even write and 1802 emulator, so
people using Linux could play tetris on a Chip8 implementation running
on emulated 1802 on an emulated coco under dosemu (my head hurts;-).

HTH

Brett K. Heath