[Coco] In a large enough FPGA you can do the whole Coco 3

[George Ramsower]

----- Original Message ----- 
From: <jdaggett at gate.net>

> Mike
> 
> In a large enough  FPGA you can do the whole Coco 3. 
> 
> Presently I can use John Kent's 6809 CPU. It takes up 2/3rds of a 
> Spartan 2e 300K gate part. The GIME is about 70% coded in VHDL. 
> Not sure but I believe that I can keep it well under 50K equivalent 
> gate count. That  leaves about 50K equivalent gate count for the 
> PIAs and the salt chip. 
> 
> Ram would be external. Thinking of using 512K srams at 20nS 
> access time. Four chips for a toal of 2Megs. John Kent's CPU runs 
> at 12.5 MHz. The initial timing data that I am seeing with the early 
> synthesis is that all logic sections operate at 50MHz or above on the 
> GIME chip section. That may reduce a bit due to routing issues 
> when the design is fitted into the FPGA.
> 
> If everything goes as hoped, I should have the GIME section coded 
> by the end of August and start testing it for the next several months. 
> 

 Would this proposed ckt be pocket sized? Imagine a "Pocket Coco"!! 
 It sounds like an RS-232 pak could be larger than the coco.