[Coco] 6309 Division instructions

[tim lindner]

I was testing the division instructions against my 6309 core (in MESS)
and found something unusual.

My Burke & Burke 6309 documents say that result of DIVD is a signed
8-bit value in register B and an unsigned remainder in register A.

Further more it says that if the quotient overflows, the value of A and
B will be unchanged and the V condition code will be set.

But this is not exactly the behiavior I am seeing on real hardware.

What I am seeing is a sort of two stage overflow. If the quotient
doesn't fit in an signed 8 bit container but would fit in a unsigned 8
bit container, then the correct absolute value is wirrten to B and the V
condition code is set.

If the value overflows an unsgined container, the registers A and B set
to the absolute value the the orginal numerator and the V condition code
is set.

I have not seen this behiavor described anywhere and I would be
interested in other peoples thoughts on it.

-- 
tim lindner
tlindner at ix.netcom.com                                            Bright