[Coco] Re: Converter update

[jdaggett at gate.net]

Yes but an 8 pin MC would be limited in its scope of duty. 

Some CPLDs have as much as 118 pins of I/O and leave room for 
additions and adaptability. As the size and I/O of a CPLD does 
increase, its cost advantage over an MC evaporates. The cost 
break between the two in terms of I/O, programbility and board 
space come when CPLDs reach about 1600 gates and over 60 I/O 
pins.

Then CPLDs can be more expensive. Large CPLDs and small 
FPGAs have one feature over any MC. That is a soft processor can 
be created with specific instruction sets to do specific tasks. These 
can be changed readily easier than a fixed instrtuction set MC.

There advantages of both worlds the hardest part is to know when 
and where to use the right parts. 

james
  



On 8 Apr 2005 at 17:15, Torsten Dittel wrote:

To:             	coco at maltedmedia.com
From:           	Torsten Dittel <Torsten at Dittel.info>
Date sent:      	Fri, 08 Apr 2005 17:15:04 +0200
Subject:        	[Coco] Re: Converter update
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> > GAL/CPLD come in packages from dip to soic to plcc. From pin 
> > count of 18 to 144. 
> 
> Hmmm... that means an 8-pin MCU would need less space...
> 
> 
> 
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