[Coco] ceramics ...

[jdaggett at gate.net]

Kevin

No. I also beleive there was a C grade that never made it in any of the data books. 
The 1983 databook did prelim an HCMOS version that may or may not have ever 
been sold. I know that by 1983 Motorola was making CMOS processors the 6805 
series were starting to be fabed in CMOS. Much of the advanced work on the 6809 
stopped after about 1984 as Motorola placed more importance on the 68K series 
processors. All that was done was maintaince of the product until 1989 when it was 
canceled. The last production run for replacement purposes was in 1999. After that 
Richardson now has the contract and all the mask sets to do any runs necessary 
should a customer wish to still use the 6809 that meets a minimum quantity. 

No Motorola does a die test after fabrication. Based on some functional tests, a 
speed grade is assigned. It is then reverified after packaging. Performance of an IC 
varies greatly over the surface area of the wafer in which it is processed. IC die 
located near or at the edges of the wafer will differ in performance due to many 
factors. One potential degradation in parameters is propogation delays and that will 
affect clocked circuits. 

One t hing that you have to remember that the 6809 series processors are not 
microcoded as more modern processors. The address mode decode and instrtuction 
decode are standard logic that is asynchronous. Also there are two clocks opreating 
in the chip that are in quadrature. The Address Buss is latched out on the rising 
edge of the Q clock and the data buss is latched in on the falling edge of the E 
clock. Also the Data buss is latched out on the falling edge of the Q clock. 

The 68809 is a mixture of synchronous sequential and combinatorial circuits as well 
as asychronous circuits. The limit of speed of the 6809 is the delay through the 
asynchronous circuits that must be present at certain times for synchronous circuits 
to have proper operation. The same holds somewhat true for the HC11 also. 
Motorola uses a two phase clock on all if not most of their CISC processors and 
microcontrollers. Why? This allows 4 states the processor can be in during one 
processor cycle. In effect you are running the processor internally at 4X that of a 
single clock processor at the same speed. 

A neat test, take a two phase quadrature clock signal and feed it into a XOR gate 
and see what the output frequency is? You will  find it is 4 times the original 
frequency. 

james 

On 4 Sep 2004 at 12:01, Kevin Diggs wrote:

Date sent:      	Sat, 04 Sep 2004 12:01:56 -0700
From:           	Kevin Diggs <kevdig at hypersurf.com>
To:             	CoCoList for Color Computer Enthusiasts 
<coco at maltedmedia.com>
Subject:        	Re: [Coco] ceramics ...
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> Hi,
> 
>  What kind of heat sinking? Were they ceramics?
> 
>  Lets back up a bit. From what I know they sold 3 speed grades of the
> 6809:  6809 (1 MHz), 68A09 (1.5 MHz), and 68B09 (2.0 MHz). Are these
> made different?
> 
>      kevin
> 
> jdaggett at gate.net wrote:
> > Mark
> > 
> > We used 68B09's at clock speeds of 12 MHz, 3 MHz buss speed 
> > 24/7 for months on end. Had little fail ure from that. 
> > 
> > Yes it is quite possible to operate an 8 MHz 68K at 14 MHz. Again it
> > may be necessary to heat sink the chip though. 
> > 
> > james
> > 
> 
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