[Coco] assembly questions?

[Mark Marlette]

At 11:38 AM 7/23/2004 -0700, you wrote:

Kevin,

Lack of registers? What are use to programming on?

Do you have VHDL training or experience? If so where?

Curious.

Regards,

Mark
Cloud-9


>Hi,
>
>         The speed of these probably isn't that crucial since there are
>so few registers to transfer between (amongst?). If I ever find a job I
>think I am gonna start with that 6809 VHDL core someone did and create
>the 6909.  One thing I think I'll include is a set of shadow registers
>and some special FAST tfr and exchange instructions to get at them. Kind
>of like a high speed register cache. Probably also need a context save
>instruction. And maybe some burst bus modes for some caches. And an
>instruction cache. And a stack cache (to speed up stack operations). And
>a 16-bit internal bus. ...
>
>         I am working on an assembly port of the old X maze program. The
>lack of registers has been ... constantly annoying.
>
>                                         kevin
>KnudsenMJ at aol.com wrote:
> >
> > Thanks -- I myself have always wondered why TFR and EXG were so slow!
> > Part of the problem seem s to be always treating them as 16-bit operations,
> > so TFR A,B takes as long as TFR X,Y.
> >
> > And the other is using that internal temp reg, which turns out not to be
> > needed -- see below.
> >
> > In a message dated 7/23/04 7:53:52 AM Eastern Daylight Time,
> > jdaggett at gate.net writes:
> >
> > > with the TFR instrtruction the third and fourth cycle write R1 to a temp
> > > register internally. On cycle 5 and 6 the temp register is written to R2.
> >
> > This sounds like an explanation I heard years ago, but below we see the 
> temp
> > wasn't needed. . .
> >
> > >  With the EXG instruction the third and fourth cycle writes R1 to the 
> temp
> > > register.
> > >  On the fifth and six instruction the contents of R2 is written to R1. On
> > the
> > > seventh  and eighth cycles the temp register is sritten to R2.
> >
> > Since R2 was written directly to R1, the TFR instruction could have 
> bypassed
> > the intermediate register too.  But I guess this implementation 
> simplified the
> > control sequencing.  Remember, the 6809 was, and remains, the most
> > sophisticated 8/16-bit micro ever made -- or darn close to it.
> >
> > Thanks again for the details.  BTW, does the 6309 cut out any of these
> > intermediate steps?  Maybe use a 16-bit internal bus?!?  --Mike K.
> >
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>
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